ARM TechCon, Reader’s Choice Innovation Awards
 
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innovation

 

 

HES™ Co-emulation named a finalist in ARM® TechCon Innovation Challenge

 

Learn more about the nominees and place your Reader's Choice vote in the ARM TechCon 2015 Innovation Challenge.

 

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  So what does a vendor-independent simulator look like

Say Hi To Hybrid

ARM® Fast Models meet Aldec Emulation

 

By Doug Amos, One-Man-Army FPGA Consultant

It has been proposed for some time that virtual platforms could be linked to emulation hardware in order to co-verify the software and hardware components of an SoC. However, that proposal now has evolved into hybrid emulation.

 

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Aldec at ARM® TechCon 2015
 
     
   
     
 

Aldec will be demonstrating this new Hybrid Emulation capability at ARM TechCon in Santa Clara, CA on 11th and 12th of November.

 

Visit us at Booth #623 to learn more about the two major components at the heart of Hybrid Emulation, the HES-7™ platform from Aldec and Fast Models from ARM®, each providing leading edge capability to the combined solution.

 

HES-7 is Aldec’s seventh generation Hardware Emulation Solution, based upon Xilinx® FPGAs and fully integrated into Aldec’s Design Verification Manager (DVM). The HES DVM™ suite is available in configurations using Virtex-2000T or Ultrascale-440 devices, offering the largest FPGA resource available on a single board, and over one billion ASIC gates in multi-board configurations.

 

More Solutions from Aldec

 

Static Design Rule Checking to address issues early in the design cycle with advanced check for structural CDC issues and extensive coverage of design rules based on recommended industry standards.

 

CDC Verification Strategies for SoC and FPGA designs to enable verification of clock domain crossings and handling of metastability issues in complex, modern multi-clock designs.

 

Mixed-language, Advanced Verification enables the ultimate testbench productivity, reusability, and automation by combining a high-performance simulation engine, advanced debugging capabilities at different levels of abstraction, and support for the latest standards.

 

To learn more, stop by Booth #623 at ARM TechCon, call +1.702.990.4400 or email sales@aldec.com.

 
     
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  Established in 1984, Aldec is an industry leader in Electronic Design Verification and offers a patented technology suite including: RTL Design, RTL Simulators, Hardware-Assisted Verification, SoC and ASIC Prototyping, Emulation, Design Rule Checking, Clock Domain Crossing, VIP Transactors, Requirements Lifecycle Management, DO-254 Functional Verification and Military/Aerospace solutions.  
     
 

+1.702.990.4400
sales@aldec.com

www.aldec.com

         
     
 
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