Aldec Design and Verification Blog

In the two previous blogs, we introduced you to the world of VUnit, guided you through creating a project from scratch, and demonstrated how to run multi-threaded unit testing of multiple independent tests....

Effective simulation is essential in hardware development, as time and accuracy are critical factors that can determine the success or failure of a project....

In the realms of HDL code verification, where precision and efficiency are crucial, a great hero has emerged; VUnit. This open-source framework for VHDL/SystemVerilog has been making waves in the industry,...

FPGA Design Verification (Planning) in a Nutshell Before wading into this topic, I’d like to state why I felt compelled to write about FPGA design verification. I recently presented a very well attended three-part webinar series, during which many attendees asked for book recommendations....

The electronics industry is all about optimization, and always has been. For example, you might think of system on chip (SoC) as a relatively recent term, coined this century. However, many regard the silicon that appeared in digital watches in the 1970s as constituting a system on a chip, ...

This week, February 22-28, we celebrate National Engineers Week in the US to recognize the contributions to society that engineers make. During this time, there is added emphasis in schools on the importance of learning...

I just returned  back to the office from the 50th Design Automation Conference (DAC) which took place in Austin, TX, on June 2—6. As I began compiling my trip report, I thought that I might share some of my observations, especially for those who couldn’t attend this industry event but still wanted to gain some insight....

This year’s Design Automation Conference (DAC) will be held in Austin, Texas.  If we survive the 70% humidity, our team looks forward to meeting you at Booth #2225 from June 3-5. Aldec HQ is located in Nevada just outside of Las Vegas… so we’re accustomed to more of a dry heat....

Modern industrial systems are faced with many key design challenges including: system complexity, real-time performance requirements, evolving standards, and rising costs. ASIC prototyping platforms, such as Aldec HES-7™, provide a platform for designers to implement and verify functionality of...

Many experienced Verilog users tend to ignore SystemVerilog - mainly because high-end verification features of the new language are getting the majority of the  attention in the press, and at conferences and trade shows. Those users may not realize that there are many SystemVerilog features that are very useful for...