Event Details View All Recorded Events Date Event Type Location Action Jun 19, 2025 FPGA Verification with VHDL and UVVM: Harnessing the power of VVCs and BFMs (EU) Time: 4:00 PM - 5:00 PM (CEST) Abstract Riviera-PRO includes a pre-compiled version of the latest UVVM, providing users with direct access to a robust verification methodology for VHDL designs. Along with this, Riviera-PRO users gain access to a comprehensive set of free and high-quality BFMs and VVCs (VHDL Verification Components) for immediate use in their testbenches. This simplifies and accelerates the verification process, offering a strong starting point for FPGA or ASIC verification projects. With ready-to-use BFMs and VVCs, users can apply them directly for standard interface tasks — a true plug-and-play experience. Within minutes of downloading, you could be executing commands like axistream_transmit(), axi_write(), uart_expect(), or ethernet_receive(). For more advanced interface management, such as introducing randomized behavior like toggling the AXI-stream valid signal, configuration records can be customized. Many UVVM users leverage these capabilities to uncover hidden design bugs early in the development cycle. In this webinar, we will demonstrate how to effectively use UVVM BFMs and VVCs, offering insights into their differences and best use cases. Whether you're tackling straightforward verification tasks or working with complex DUTs and stringent quality requirements, we will cover practical tips and strategies to optimize your verification efforts. Agenda: Enabling Quality and Efficiency A brief introduction The UVVM BFMs – concept and usage The step from BFM to VVC The UVVM VVCs – concept and usage Important additional features for better quality and efficiency Conclusion Q&A Webinar Duration: 45 min presentation/live demo 15 min Q&A Presenter BIO Espen Tallaksen is the CEO of EmLogic, in Norway.Espen is also the author and architect of the Open Source UVVM (Universal VHDL Verification Methodology), andhas a strong interest in methodology cultivation and pragmatic efficiency and quality improvementHe has given lots of technical presentations at various international conferences with great feedback. He is also giving courses on FPGA Design and Verification world-wide. Webinar Online Register
