Aldec to Demonstrate Support for Xilinx UltraSCALE and SoC at X-Fest Events in North America

Henderson, NV – September 8, 2014 – Aldec, Inc., a pioneer in mixed HDL language simulation and hardware-assisted verification solutions for system and ASIC designs, will be on hand at several X-Fest events in North America to demonstrate its industry leading functional verification platform and support for the latest Xilinx® UltraSCALE™ and SoC Devices.

 

FPGA Design & Simulation Mixed-Language, VHDL, UVM, Verilog/SystemVerilog	Functional Verification Bus Functional Models with UltraSCALE™ & SoC Devices
Hardware Emulation Solutions SoC Emulation w/ Zynq™ ARM® Cortex® ASIC Prototyping w/ UltraSCALE™	SecureIP & AXI Support Extending peripherals with SmartCORE™ & LogiCORE™

 

 X-Festis hosted by Avnet and Xilinx, the X-fest technical program is a global series of seminars offering practical, how-to training for FPGA, SoC, DSP, and embedded systems designers.

 

As a member of the Xilinx Alliance Program, Aldec works together with Xilinx to enable tools for Design Entry, HDL Simulation, Design Rule Checking, and HW Assisted Verification, providing comprehensive hardware design and verification platform for the most advanced devices in the Xilinx portfolio. For a chance to win a Go-Pro Camera and to learn more, look for Aldec at these upcoming X-Fest events in North America.

 

X-Fest Irvine, CA September 9, 2014	X-Fest Baltimore/N. Virginia/DC (MD)           September 16, 2014
X-Fest Boston, MA September 17, 2014	X-Fest Dallas, TX           September 25, 2014
X-Fest Chicago, IL October 22, 2014

 

About Aldec

Aldec Inc., headquartered in Henderson, Nevada, is an industry leader in Electronic Design Verification and offers a patented technology suite including: RTL Design, RTL Simulators, Hardware-Assisted Verification, SoC and ASIC Prototyping, Design Rule Checking, IP Cores, Requirements Lifecycle Management, DO-254 Functional Verification and Military/Aerospace solutions. www.aldec.com