Integration improves visualization from Aldec′s fault analysis GUI cockpit and delivers higher quality designs

Freiburg, Germany - June 1, 2015 - Concept Engineering, specialists in visualization and debugging technology for electronic circuits and systems, and Aldec, a pioneer in mixed HDL language simulation and hardware-assisted verification solutions for system and ASIC designs, have signed a multi-year OEM agreement to integrate and use Concept Engineering′s Nlview™ customizable schematic generation engine as the visualization engine within Aldec′s clock domain crossing analysis tool, ALINT-PRO-CDC™. The new ALINT-PRO-CDC fault analysis GUI cockpit allows design engineers to more easily understand and fix critical CDC problems and to deliver higher quality designs.

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by Don Dingee

A few months ago, when the Xilinx UltraScale VU440 FPGA began shipping, one of the immediate claims was a quad-FPGA-based prototyping board touted as “Godzilla’s Butcher on Steroids”. That was a refreshing and creative PR approach, frankly. I’m always careful with less creative terms like “world’s biggest” or “world’s fastest”, because they can overstate a snapshot – such a claim can easily dissipate tomorrow. I prefer a term like “industry first” since it recognizes that.

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