HDL Coding Standards

HDL Coding Standards (Safety-Critical Designs)

In order to prevent potentially unsafe attributes of HDL code from leading to unsafe design issues, the use of HDL coding standards is required by various safety-critical industries such as DO-254. The HDL coding standards must be defined, reviewed and documented.  ALINT-PRO™ is a fully automated design rule checker equipped with industry-proven VHDL/Verilog standards and provides an automated code review. The VHDL/Verilog standards included cover essential areas in HDL coding such as coding style, readability, simulation, clock/reset management, design reuse, coding for safe synthesis and implementation, clock domain crossings (CDC) and design for test (DFT).

It is not possible to specify all design requirements by using HDL code only. The SDC format is used for describing various requirements and ALINT-PRO supports essential subset of SDC commands for more accurate linting results. In addition, block-level constraints mechanism and constrained built-in vendor libraries ensure that even design with black-boxes is fully constrained for a complete analysis.

ALINT-PRO™ also provides robust documentation features beneficial to reporting, audits and reviews. ALINT-PRO™ features a Violation Viewer for detected violations and Waivers mechanism that allows associating “irrelevant” violations with the appropriate justification comments. Being tightly integrated with the coding standard violation analysis and reporting interfaces, these features enable push-button reporting and facilitate the desirable practice of creating quality design artifacts essential to obtaining compliance with the requirements outlined in the various safety-critical design assurance standards.

Additionally, Clock Domain Crossing issues like non-synchronized CDC transfers, convergence/divergence, combinational logic on CDC paths and incorrect synchronizer structures detected during linting process can be easily investigate by using dedicated windows like CDC Viewer, CDC Schematic and RTL Schematic.