FAQ Search in Resources Articles Manuals -OR- All Products Active-HDL Riviera-PRO ALINT-PRO HES-DVM HES Proto-AXI HES™ Boards RTAX/RTSX Adaptor Boards HES-DVM Proto Cloud Edition TySOM™ EDK Spec-TRACER DO-254/CTS All Documents Application Notes Manual Demonstration Videos FAQ Recorded Webinars Tutorials White Papers Technical Specification Case Studies All Categories Coverage 3rd Party Integration Design Entry, Documentation Simulation, Debugging Design Management, Libraries Advanced Verification Assertions and Functional Coverage RTL Simulation & Verification HDL Languages Encryption Military & Aerospace Verification Design Rule Checking Design Hardware Emulation Solutions Encryption Design HDL Languages RTL Simulation & Verification Assertions and Functional Coverage Advanced Verification Design Rule Checking Military & Aerospace Verification Hardware Emulation Solutions Tutorials Prototyping High-Level Synthesis Embedded Embedded Embedded High Performance Computer SoC & ASIC Prototyping Reset Results Name Products Type Action #ELBREAD: Warning: Module 'module_name' does not have a `timescale directive, but previous modules do. Riviera-PRO FAQ ACOM: Error: COMP96_0153: Formal "name" of class variable must be associated with a variable Riviera-PRO FAQ ACOM: Error: ELAB1_0021: filename.vhd: Types do not match for port "port_name" Riviera-PRO FAQ Compiling altera_primitives.v (Quartus 11.1) in Riviera-PRO and Active-HDL Active-HDL, Riviera-PRO FAQ Components of XilinxCoreLib Library Are Missing after Migration to Xilinx Vivado Active-HDL, Riviera-PRO FAQ Does Riviera-PRO create core dump file? Riviera-PRO FAQ ELBREAD: Error: You do not have a valid license to run VHDL simulation Riviera-PRO FAQ ELBREAD: Error: You do not have a valid license to run a Verilog simulation Riviera-PRO FAQ ERROR VCP2000 "Syntax error. Unexpected token: library[_IDENTIFIER]. Expected tokens: 'function' , 'task' , 'timeprecision' , 'timeunit' , 'const' ... ." Riviera-PRO FAQ Error while loading shared libraries: libtyphoon.so:cannot restore segment prot after reloc:Permission denied Riviera-PRO FAQ Error: ALOG: Cannot add data to library Riviera-PRO FAQ Error: COMP96_0115: Actual is not a globally static expression Riviera-PRO FAQ Error: Design unit not found in searched libraries: Riviera-PRO FAQ Error: E8017 : Internal application error - please contact Aldec support - support@aldec.com Riviera-PRO FAQ Error: VCP2505 : Duplicate identifier: Riviera-PRO FAQ Error: VCP2562 : Redeclaration of port Riviera-PRO FAQ Error: VCP6251 Error in SLP repository: Unknown repository object type Riviera-PRO FAQ Fatal Error: ELAB2_0056 Port '' not found Riviera-PRO FAQ Fatal Error: filename.sv: Bind: unresolved hierarchical reference to object "object name" Riviera-PRO FAQ Floating License Installation on Linux/Unix Active-HDL, Riviera-PRO, ALINT FAQ 53 results (page 1/3)
