Accelerating UVM Verification with Emulation In this video, Application Engineer Henry Chan, explains how emulation can help accelerate UVM-based testbenches and explores the benefits of emulation/acceleration over traditional simulation tools. A cursory overview of the Accellera SCE-MI standard as well as some necessary testbench modifications for emulation/acceleration are presented. A case-study using a UVM testbench and Network-on-Chip design is examined to demonstrate the benefits of emulation.
