Play WebinarTitle: Mixed-Signal Verification – Bringing the Best of Both Worlds Together w/ Tanner EDADescription: In this webinar - presented jointly by Aldec and Tanner EDA - we will talk about the integrated solution for verification of mixed-signal IC designs. Aldec & Tanner EDA have worked together to create a co-simulation interface that enables users to run mixed-signal simulation using highly accurate SPICE engine and high performance digital simulator. Traditionally highly accurate SPICE based simulation is very popular for the verification of analog designs, but it is too slow to deal with digital part. Event-driven digital simulation can handle digital portion, but fails when dealing with the analog design. The co-simulation interface bridges the gap between these issues and provides a reliable solution using any combination of Verilog-AMS, Verilog-A, Verilog and SPICE netlists.Signing up for an account is easy. With an Aldec account you'll have easy, one-click access to event registration, support, product downloads, evaluation licenses, recorded webinars, white papers, application notes and other resources. Simply provide your corporate e-mail address below - all account requests are verified and confirmed within 48 hours. If you already have an Aldec account, please Sign In below to download the file. Register Sign In
