Play WebinarTitle: Physical Testing for DO-254Description: For DAL A/B FPGAs, applicants are recommended to verify the device behavior at the silicon level (physical testing) in order to satisfy the objectives defined in RTCA/DO-254 Section 6.2.1 Verification Process. This is recommended because there are significant errors that may potentially impact safety but can only be found through physical testing. However, physical testing of the FPGA in the target board is quite challenging and not feasible in most cases. That is why both FAA and EASA allow for alternate verification means if physical tests in the target board are not feasible. Learn in this webinar a methodology that enables requirements-based physical testing with 100% FPGA I/O controllability and visibility necessary to satisfy the objectives.Signing up for an account is easy. With an Aldec account you'll have easy, one-click access to event registration, support, product downloads, evaluation licenses, recorded webinars, white papers, application notes and other resources. Simply provide your corporate e-mail address below - all account requests are verified and confirmed within 48 hours. If you already have an Aldec account, please Sign In below to download the file. Register Sign In
