Events Schedule

Recorded Events
Date Event Type Location Action
Nov 20, 2024 VHDL/SystemVerilog RTL verification environment using cocotb ~ Test bench that can be written in Python Webinar Tokyo, Japan Register
Nov 27, 2024 FPGA design verification in a nutshell: Part 1 Webinar Tokyo, Japan Register
Jan 23, 2025 Mastering SoC Design and Verification for DO-254 Compliance – Balancing Complexity and Safety (Hosted by ConsuNova) Webinar Online Register
Feb 06, 2025 Simplifying DO-254 Compliance for FPGA Designs – A Practical Approach (EU) Webinar Online Register
Feb 06, 2025 Simplifying DO-254 Compliance for FPGA Designs – A Practical Approach (US) Webinar Online Register
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