Aldec Design and Verification Blog Trending Articles Navigating VUnit: A Practical Guide to Modifying Testing Approaches Speeding Up Simulation with VUnit for Parallel Testing Introduction to VUnit FPGA Design Verification in a Nutshell Versal ACAP Simulation Challenges Real-time SDR system with TySOM The Convergence of Emulation and Prototyping All Categories Corporate DO-254 Compliance Embedded Solutions Emulation/Acceleration FPGA Design Functional Verification High Performance Computing Requirements Management SoC and ASIC Prototyping SoC Design and Validation Specialized Applications Emulation on the Cloud HES Cloud delivers access to a high performance emulation platform ‘The cloud’ has been an industry buzz word for some time now and whilst the initial focus was on data storage and sharing - and spawned the likes of Dropbox – ‘cloud computing’ is currently the latest trend. For instance, Amazon’s cloud platform, ... Tags:Emulation,Hardware,Hardware Emulation,Virtex-7 Like(3) Comments (1) Read more FPGAs in an SoC World How modern FPGA architecture influences verification methodologies The SoC domination observed so far in the ASIC industry is coming to the FPGA world and changing the way FPGAs are used and FPGA projects are verified. The latest SoC FPGA devices ... Tags:ARM,ASIC,FPGA,Hardware-Assisted Verification,Hardware Emulation,Verification Like(4) Comments (1) Read more Leverage Hardware Acceleration for Faster Simulation Breaking the Bottleneck of RTL Simulation Utilizing hardware acceleration in a System-on-Chip verification cycle can speed-up HDL simulation runs from 10-100x, while providing the robust debugging available from an RTL simulator.... Tags:Aceleration,FPGA,Hardware Emulation,HDL Like(3) Comments (0) Read more
