Aldec’s Active-HDL Celebrates Sweet 16 with Another Top FPGA Design Award

Henderson, NV – August 26, 2013 –Active-HDL, Aldec’s all-in-one tightly integrated solution offering design creation, documentation, code coverage and simulation, was awarded the 2013 Excellence Award - FPGA Tools for the fourth consecutive year by Chinese Electronics News (CEN).  This prestigious award, recognizing top contributors in the semiconductor industry, was presented at China’s fifth annual FPGA Industry Development Forum.

 

“Active-HDL has evolved tremendously since its initial launch in 1997 and continues to be the tool of choice for FPGA designers,” said Satyam Jani, Aldec Software Division Product Manager, “Aldec’s receipt of this prestigious award demonstrates our commitment to investing in our products to continually meet the growing needs of the FPGA design community.”

 

The forum honored the following companies:

 

 

Receipt of the 2013 Excellence Award - FPGA Tools recognizes the robustness of Aldec’s design and verification platform, which has all the tools necessary for efficient development of today’s FPGA devices that have complexity level comparable with traditional ASICs. The tool suite provided by Aldec boasts efficient design entry and documentation tools, high-performance simulation, and powerful debugging tools for analysis and visualization of key design objects throughout the whole development process. Comprehensive support for assertion languages, advanced code and functional coverage analysis capabilities, and strong commitment toward the support of all the latest HDL and HVL standards make Aldec’s customers truly independent from any languages or methodologies imposed by the EDA community.

 

Availability

For additional information about Active-HDL including resources and free evaluation download, visit www.aldec.com/Products/Active-HDL. Popular Active-HDL videos are also available at www.youtube.com/user/aldecinc.

 

About Aldec

Aldec Inc., headquartered in Henderson, Nevada, is an industry leader in Electronic Design Verification and offers a patented technology suite including: RTL Design, RTL Simulators, Hardware-Assisted Verification, SoC and ASIC Prototyping, Design Rule Checking, IP Cores, Requirements Lifecycle Management, DO-254 Functional Verification and Military/Aerospace solutions. www.aldec.com