SystemVerilog IEEE 1800™-2012 (Verification) for Active-HDLCategory : Supported StandardsActive-HDL supports SystemVerilog (IEEE Std. 1800™-2012) in three areas: hardware description extensions, assertions and advanced verification. The latter, known as the Verification portion of the standard includes constructs such as, random constraints, coverage groups, etc. to enable self-checking and coverage driven testbench design.
