Can’t make the webinar? Go ahead and register. You’ll receive a link to view the recording at your convenience.
 
aldec webinar
 
 
 
‘Fast Track to ALINT-PRO: Design Entry and Linting’
 
     
 

ALINT-PRO is a design verification solution for RTL code focused on general issues analysis including: RTL and post-synthesis simulation mismatches, design coding for optimal synthesis, avoiding problems on further design stages, and coding for portability and reuse. The solution performs static analysis based on RTL and SDC™ source files uncovering critical design issues early in the design cycle, which in turn reduces design time dramatically.

 

NOTE: The current release contains VHDL-only version of rule plug-ins, except for ALDEC_CDC, which is a language independent plug-in.

 

This “Fast Track” series webinar is designed to help engineers get up to speed quickly with ALINT-PRO. Learn how to prepare designs for analysis in ALINT-PRO and obtain linting results. In this webinar, we will also cover workspace and project setup, library management, linting configuration, and violation analysis.

 
     
 
register today
 

Date: Thursday, November 19, 2015

Register for EU 3:00PM to 4:00PM CET

 
     
 
register today
 

Date: Thursday, November 19, 2015

Register for US 11:00AM to 12:00PM PST

 
     
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So what does a vendor-independent simulator look like
 

Presented by Pavel Leshtaiev, ALINT-PRO™ Product Manager

Pavel is a Product Manager at Aldec for DRC and CDC solutions. He received his MS in Special-Purpose Computer Systems from the Chernihiv State University of Technology, Ukraine. Pavel has been directly with ALINT™ and ALINT-PRO™ since 2009, with experience in roles such as SQA Engineer, SQA Team Leader, Applications Engineer, Project Manager and Product Manager. He has deep practical experience in design verification techniques and best practices, particularly in the field of FPGA design.

 
   
     
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  Aldec is a global industry leader in Electronic Design Verification and offers a patented technology suite including: RTL Design, RTL Simulators, Hardware-Assisted Verification, SoC and ASIC Prototyping, Design Rule Checking, CDC Verification, IP Cores, DO-254 Functional Verification and Military/Aerospace solutions.  
     
 

+1.702.990.4400
sales@aldec.com

www.aldec.com

         
     
 
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