Aldec Design and Verification Blog Trending Articles Scalable Cloud-based CICD HDL Verification Environment Navigating VUnit: A Practical Guide to Modifying Testing Approaches Speeding Up Simulation with VUnit for Parallel Testing Introduction to VUnit FPGA Design Verification in a Nutshell Versal ACAP Simulation Challenges Real-time SDR system with TySOM All Categories Corporate DO-254 Compliance Embedded Solutions Emulation/Acceleration FPGA Design Functional Verification High Performance Computing Requirements Management SoC and ASIC Prototyping SoC Design and Validation Specialized Applications Scalable Cloud-based CICD HDL Verification Environment Enhance Your Verification Workflow with Azure, VUnit, and Riviera-PRO Verification is the cornerstone of digital design, ensuring high reliability and functional correctness of FPGA and SoC designs. By integrating Azure’s scalable cloud computing, the open-source unit testing capabilities of VUnit, and the high-performance simulation engine of Riviera-PRO,... Tags:Aceleration,Functional Verification,HDL,Riviera-PRO,Simulation,Verification,VHDL Like(0) Comments (0) Read more Navigating VUnit: A Practical Guide to Modifying Testing Approaches In the two previous blogs, we introduced you to the world of VUnit, guided you through creating a project from scratch, and demonstrated how to run multi-threaded unit testing of multiple independent tests.... Tags:Aceleration,Functional Verification,HDL,Riviera-PRO,Simulation,Verification,VHDL Like(0) Comments (0) Read more Speeding Up Simulation with VUnit for Parallel Testing Effective simulation is essential in hardware development, as time and accuracy are critical factors that can determine the success or failure of a project.... Tags:Aceleration,Functional Verification,HDL,Riviera-PRO,SystemVerilog,VHDL Like(0) Comments (3) Read more Introduction to VUnit In the realms of HDL code verification, where precision and efficiency are crucial, a great hero has emerged; VUnit. This open-source framework for VHDL/SystemVerilog has been making waves in the industry,... Tags:Aceleration,Functional Verification,HDL,Riviera-PRO,VHDL Like(0) Comments (0) Read more Development of real-time SDR systems with Aldec HES As telecommunication technologies evolve there is an on-going drive for the development of high-performance systems for radio communications. Part of that evolution involves implementing components in software functions that had traditionally been implemented in hardware.... Tags:Aceleration,FPGA,Hardware,HDL,Prototyping,Simulation,Xilinx,Design Like(8) Comments (7) Read more SynthHESer - Aldec’s New Synthesis Tool In the early days of digital design, all circuits were designed manually. You would draw K-map, optimize the logic and draw the schematics. If you remember, we all did many logic optimization exercises back in college.... Tags:Xilinx,Aceleration,Design,Embedded,Emulation,HDL,SystemVerilog,Verilog Like(2) Comments (2) Read more Linting RISC-V designs with ALINT-PRO As the open-source RISC-V instruction set architecture (ISA) continues to gain momentum, the growing number of RISC-V design solutions, and their flexibility, creates a problem when choosing the most reliable and robust solution from a number of contenders.... Tags:ASIC,FPGA,HDL,Verification,Verilog,Design,Digital,IP,Linting,SoC,SystemVerilog Like(2) Comments (0) Read more What is Bird’s Eye View ADAS Application and How to Develop This Using Zynq® UltraScale+™ MPSoC FPGA? Bird’s eye view definition, HW/SW setup and implementation algorithms Will the world be a better place in which to live by having autonomous cars driving around us? Or would it be unsafe and scary? Maybe someone was asking such a question even when the first steam-powered automobile capable... Tags:Aceleration,ARM,Embedded,FPGA,Hardware,HDL,Prototyping,Validation,Verification,Verilog,Design,Digital,SoC,Xilinx,Zynq Like(1) Comments (0) Read more HW/SW Co-Simulation for SoC FPGA designs Aldec’s Co-Simulation Solution using QEMU and Riviera-PRO Heterogeneous System on Chip (SoC) devices like the Xilinx Zynq 7000 and Zynq UltraScale+ MPSoC combine a high-performance processing system (PS) with state-of-the-art programmable logic (PL).... Tags:Co-simulation,Embedded,FPGA,Hardware,HDL,Simulation,SoC,Validation,Verification,Verilog,VHDL,Xilinx Like(2) Comments (0) Read more The Power of PCIe in Performance-based FPGA World Understanding High speed serial data transfer In today's world, when the entire computing industry is talking about high-performance and high-speed applications using FPGAs, just what are the factors that can assure such performance and speed?... Tags:Aceleration,ASIC,Co-simulation,Documentation,Embedded,Emulation,FPGA,FPGA Simulation,Hardware,HDL,IP,Prototyping,Simulation,SoC,Validation,Verification,Xilinx Like(3) Comments (0) Read more
