Aldec Design and Verification Blog Trending Articles Scalable Cloud-based CICD HDL Verification Environment Navigating VUnit: A Practical Guide to Modifying Testing Approaches Speeding Up Simulation with VUnit for Parallel Testing Introduction to VUnit FPGA Design Verification in a Nutshell Versal ACAP Simulation Challenges Real-time SDR system with TySOM All Categories Corporate DO-254 Compliance Embedded Solutions Emulation/Acceleration FPGA Design Functional Verification High Performance Computing Requirements Management SoC and ASIC Prototyping SoC Design and Validation Specialized Applications Scalable Cloud-based CICD HDL Verification Environment Enhance Your Verification Workflow with Azure, VUnit, and Riviera-PRO Verification is the cornerstone of digital design, ensuring high reliability and functional correctness of FPGA and SoC designs. By integrating Azure’s scalable cloud computing, the open-source unit testing capabilities of VUnit, and the high-performance simulation engine of Riviera-PRO,... Tags:Aceleration,Functional Verification,HDL,Riviera-PRO,Simulation,Verification,VHDL Like(0) Comments (0) Read more Navigating VUnit: A Practical Guide to Modifying Testing Approaches In the two previous blogs, we introduced you to the world of VUnit, guided you through creating a project from scratch, and demonstrated how to run multi-threaded unit testing of multiple independent tests.... Tags:Aceleration,Functional Verification,HDL,Riviera-PRO,Simulation,Verification,VHDL Like(0) Comments (0) Read more Speeding Up Simulation with VUnit for Parallel Testing Effective simulation is essential in hardware development, as time and accuracy are critical factors that can determine the success or failure of a project.... Tags:Aceleration,Functional Verification,HDL,Riviera-PRO,SystemVerilog,VHDL Like(0) Comments (3) Read more Introduction to VUnit In the realms of HDL code verification, where precision and efficiency are crucial, a great hero has emerged; VUnit. This open-source framework for VHDL/SystemVerilog has been making waves in the industry,... Tags:Aceleration,Functional Verification,HDL,Riviera-PRO,VHDL Like(0) Comments (0) Read more FPGA Design Verification in a Nutshell FPGA Design Verification (Planning) in a Nutshell Before wading into this topic, I’d like to state why I felt compelled to write about FPGA design verification. I recently presented a very well attended three-part webinar series, during which many attendees asked for book recommendations.... Tags:ASIC,Coverage,Design,Functional Verification,Debugging,Documentation,Digital,SoC,Verification,Verilog,VHDL Like(0) Comments (0) Read more Versal ACAP Simulation Challenges The electronics industry is all about optimization, and always has been. For example, you might think of system on chip (SoC) as a relatively recent term, coined this century. However, many regard the silicon that appeared in digital watches in the 1970s as constituting a system on a chip, ... Tags:Embedded,FPGA,Riviera-PRO,FPGA Simulation,Functional Verification,safety-critical,SystemC,SystemVerilog,VHDL,UVM Like(0) Comments (0) Read more Is your Verification plan pulling you in multiple directions? Try FSM Coverage A quick look into FSM Coverage The verification process is long and time consuming, especially when you are not sure what you are looking for. There are a lots of directions you can go looking for bugs but without a guide, without a plan you will most likely be going in circles.... Tags:Coverage,Debugging,Design,FPGA,SystemVerilog,Verilog,VHDL Like(1) Comments (8) Read more HW/SW Co-Simulation for SoC FPGA designs Aldec’s Co-Simulation Solution using QEMU and Riviera-PRO Heterogeneous System on Chip (SoC) devices like the Xilinx Zynq 7000 and Zynq UltraScale+ MPSoC combine a high-performance processing system (PS) with state-of-the-art programmable logic (PL).... Tags:Co-simulation,Embedded,FPGA,Hardware,HDL,Simulation,SoC,Validation,Verification,Verilog,VHDL,Xilinx Like(2) Comments (0) Read more The Race to Zero Latency for High Frequency Trading The High-Frequency Trading (HFT) industry has received a lot of attention during the last few years. HFT is all about speed and minimizing latency: the faster you can run trading strategies and algorithms for analyzing minute price changes... Tags:Aceleration,Coverage,Verification,Verilog,VHDL Like(2) Comments (0) Read more FPGA vs GPU for Machine Learning Applications: Which one is better? Can FPGAs beat GPUs? FPGAs or GPUs, that is the question. Since the popularity of using machine learning algorithms to extract and process the information from raw data, it has been a race between FPGA and GPU vendors to offer... Tags:Aceleration,Embedded,FPGA,Hardware,HDL,Validation,Verilog,VHDL,Xilinx Like(3) Comments (0) Read more
