Aldec reprograms HES7 for AXI4 speedDate: 2016/02/26 Type: In the News by Don Dingee FPGA-based prototyping firms are all grappling with the problem of higher speed connectivity between a development host and their hardware. Aldec is announcing their solution at DVCon 2016, turning to an AMBA AXI4 interface bridged into a host with PCIe x8. For the rest of this article, please visit Semiwiki