Resources

The Federal Aviation Administration (FAA) recognizes the use of commonly used tools for FPGA design and verification such as RTL Simulator, Synthesis, Place & Route and Static Timing Analysis. For DAL A and B FPGAs, the FAA also recognizes other tools that improve design, verification, traceability and project management including Requirements Management, Traceability, Tests Management, Design Rule Checker, Clock Domain Crossings (CDC) Analysis, Code Coverage and FPGA Physical Test Systems.

DO-254 enforces a strict requirements-driven process for the development of commercial airborne electronic hardware. For DO-254, requirements must drive the design and verification activities, and requirements traceability helps to ensure this. This paper explains the rationale behind requirements traceability including its purpose and resulting benefits when done correctly.

If you are new to DO-254, this white paper can serve as your starting point as you educate yourself with the guidance and regulation. This white paper provides an overview of RTCA/DO-254 purpose, scope and processes, and as well as description of Aldec’s specialized tools for DO-254 targeting DAL A and B PLDs.

Safety-critical industry standards such as DO-254 for avionics, IEC 61508/61511 for industrial and ISO 26262 for automotive enforce a requirements-based verification process to ensure that the end-product is reliable, safe and will function as intended under all foreseeable conditions. Adhering to a strict requirements-based verification approach entails that organizations must follow certain processes and provide a long list of reports and deliverables. With the growing size and complexity of today’s FPGAs and SoCs, the requirements that must be managed, reviewed, validated, traced, implemented and verified have also undeniably multiplied. Requirements frequently change impacting other project elements which leads to more rework, redesign and retests. The traceability from requirements to test data must be created and preserved so testing activities can get chaotic without a systematic method to manage it. If organizations do not have a system in place to efficiently manage these underlying activities, this translates to more time and money and unfortunately in many cases project failure. Learn in this webinar the common processes of requirements-based verification for safety-critical FPGAs and SoCs. We will describe the associated challenges, and we will show how Aldec’s tool Spec-TRACER can facilitate industry best engineering best practices to overcome these challenges. Play webinar   

This paper provides an overview of the Validation and Verification (V & V) process and its associated activities as described in RTCA/DO-254. With the growing size and complexity of today’s FPGAs, managing V & V activities is becoming difficult and time-consuming. This paper presents a list of recommended features, methodologies and capabilities that must be supported by a tool to manage V & V activities more efficiently.

Aldec together with FAA DER Randall Fulton conducted a webinar to provide clarifications on some of the most commonly misunderstood objectives and aspects of DO-254. The following is the list of questions that were submitted to Aldec for the webinar. All questions are related to applying DO-254 to FPGAs and PLDs. The answers from Randall Fulton are provided correspondingly.