Multimedia

This video will show you how to install and setup the main ALINT-PRO application as well as additional rule plug-ins. Installation of extra rulesets can be confirmed within the main tool and enabled via the policy editor. For license verification during setup, the license diagnostic tool provides ample information on the current license file and licensed modules.

ALINT-PRO's Flow Manager window allows managing the design analysis process in a convenient way. This video will show each step of the design flow, going through parse, elaboration, synthesis, constraints, and finally linting. At each step, more information about a project can be obtained. Additionally, each step includes various settings and configurable properties that allow for a highly customized linting process.

Whether one chooses to develop their design in Active-HDL, Riviera-PRO, Quartus, or Vivado, ALINT-PRO can always be used to perform design rule checking via the tool's convert feature. Converting external project files into ALINT-PRO turns the source project files into the equivalent ALINT-PRO workspace and project structure. Once converted, the design is then accessible to all of the solution's linting and rule checking features.

ALINT-PRO's violation viewer provides a user friendly window for displaying and managing design rule violations. Coupled with automatic report generators, the tool helps not only to identify any violations within your design, but also document them so that they may be corrected and even prevented in later designs. Automatic report generators come in a number of formats, including CSV, PDF, HTML, as well as Quality Reports which provide metrics on how compliant a design is to a given rule set.

Workflow in ALINT-PRO is organized through projects that are grouped into workspaces. A project will contain the set of properties and files, those being your HDL source code and design constraints, to form a single entity that makes up part of your design. Libraries are automatically generated at the local level and correspond to projects within the workspace. Additional libraries can be added through the tool's library export and attach features.

The quality of linting results is largely dependent on one's policies and rules. Through the use of its policy editor, ALINT-PRO provides an effective means of managing and customizing those policies and rules to best fit the standards and practice of one's design team or company.

Waivers provide an excellent service in managing violations during the linting process by ignoring those violations or sources of violations that might be too pessimistic for or not applicable to one's design. ALINT-PRO's interface provides an easy process for adding and removing these waivers no matter the source. Additionally, the tool's waiver editor provides a single location where one can manage and edit an entire project's waiver list, and even export this list for future projects.

Through the RTL Schematic Window, ALINT-PRO provides a powerful graphical representation of a design's netlist. This window can be accessed, or cross-probed, from various other windows within the tool, which focuses on and highlights those different sources.

Active-HDL offers the design rule checking capabilities of ALINT-PRO directly within the tool through unit linting. Running the feature within the design tool's GUI will perform design checks according to the generated ALINT-PRO project, and those violations will be displayed in Active-HDL's console and HDL editor in the form of various warnings and messages. Modification of a design's policy is facilitated through additional context menu items within the Design Browser, which allows launching of ALINT-PRO into the relevant views for modifying policy or waivers.

Command Line and Batch modes allow a user to have the full functionality of ALINT-PRO without the requirement of running any graphical user interface. This is achieved by inputting interactive commands in the case of command line mode or providing a script or list of these commands in the case of batch mode.

Important simulator commands from other tools such as Active-HDL and Rivera-PRO are supported within ALINT-PRO's interactive console and batch modes. These compatibility commands invoke similar behavior within the tool and allow those traditional macros from other tools to be used within ALINT-PRO. While these commands are functional and provide a means of design entry, it is recommend to use native ALINT-PRO commands when working within a normal workflow.

Policy and Waiver configuration options that are available within the ALINT-PRO GUI can also be modified at the command line using specific "project.policy" and "project.waiver" commands. These commands can be configured and enabled quicker than making selections through the GUI, as are most other functionalities when it comes to using the command line.

Linting can be ran directly from your design tool using the "Run In Aldec ALINT-PRO" feature available in Active-HDL. This feature can either generate a new tcl script that automatically converts the design workspace and performs linting or can use an existing script to perform after launching the ALINT-PRO software.

Linting can be ran directly from your simulation tool using the "Check in Aldec ALINT-PRO" feature available in Riviera-PRO. This feature can either generate a new tcl script that automatically converts the design workspace and performs linting or can use an existing script to perform after launching the ALINT-PRO software.

Riviera-PRO offers the design rule checking capabilities of ALINT-PRO directly within the tool through unit linting. Running the feature within the design tool's GUI will perform design checks according to the generated ALINT-PRO project, and those violations will be displayed in Riviera-PRO's console and HDL editor in the form of various warnings and messages. Modification of a design's policy is facilitated through additional context menu items within the Design Browser, which allows launching of ALINT-PRO into the relevant views for modifying policy or waivers.

Some FPGA projects, especially in defense, are version-locked and must use older Xilinx chip families and use Xilinx ISE as the design environment. While ISE can provide limited verification capabilities, it requires long iterations of identifying an issue, then tracing that to a root cause, correcting the code and re-running the implementation phases again. Importing your Xilinx ISE designs into Aldec's ALINT-PRO would be particularly useful to prevent mistakes in early design stages.​

​Modern Xilinx designs are quite complex and often involve IP blocks. While Vivado can provide basic DRC methodologies and CDC Checks, debugging the results can be difficult. Importing your Xilinx Vivado designs into Aldec's ALINT-PRO would be particularly useful to prevent mistakes in early design stages, and the flow is much quicker as it would avoid low-level synthesis and optimization.​

In projects with encrypted IP, unimplemented components, or simply missing libraries, it is necessary to add block-level design constraints to ensure proper linting of your design. Constraints can be applied to those black box components where internal logic is unreachable and provides the tool with the much-needed information on how that module operates. This behavior is passed by setting cell and pin types, or simply using one of the built-in lib function for common components.

Library functions are a convenient means of adding block-level constraints to your project by providing a shorter syntax for some of the most common design components. Instead of making multiple calls to the "set_cell" and "set_pin" commands, a single use of these along with the "-functional" argument and relevant library function can fully and accurately provide those same block-level constraints. Additionally, constraints for clock and reset generators can be applied using the "create_generated_cell_clock" and "create_generated_reset" commands.

Chip-level constraints can be generated quickly and conveniently via Aldec's design constraint commands such as save_all_clocks or save_input_delays. When entered at command line or within an executable script, all relevant and detected constraints are automatically added to the active project's default constraint file. Constraints are also available for clock groups, allowing the explicit grouping of asynchronous and synchronous clock domains.