It’s no accident that Aldec offers the best VHDL-2008 support

Here at the Aldec corporate office, we have a sign that reminds us all of our mission in the field of Technology. It reads, ‘To deliver solutions that provide the highest productivity to value ratio; supporting our existing products while delivering innovation to current and new technologies’. We have similar statements to reaffirm our commitment in the areas of Research, Alliances, and Culture– we call it our “Aldec DNA”. 

Because we genuinely want to have a clear understanding of our user’s requirements and methodology preferences, we continually engage in surveys and interviews.  The knowledge we gain better positions us to support our existing products and to deliver that support where it matters the most to our users. If you’ve ever had that frustrating experience where your favorite tool no longer supports your methodology of choice - then you understand why this is so important.

Our Commitment to the VHDL Community

When it comes to VHDL-2008, we have learned from our customers that many are happy using the methodology – and continue to successfully deliver cutting-edge technology with it. So, while we remain committed to delivering innovation to new technologies, our R&D teams also invest a great deal of development time to ensure that Aldec solutions continue to offer a high level of support for popular languages like VHDL.

In our commitment to the language, which Aldec has supported since the publication of the first IEEE standard in 1987, Aldec also serves as a member of the IEEE 1076 Working Group to help develop the industry standard.

We have also partnered with Synthworks to bring Open Source VHDL Verification Methodology (OSVVM) to the VHDL community. OSVVM is an intelligent testbench methodology that allows mixing of “Intelligent Coverage” (coverage driven randomization) with directed, algorithmic, file based, and constrained random test approaches. If you have an hour, you might check out this recently recorded joint webinar to learn more: VHDL Intelligent Coverage™ using OSVVM.

VHDL Resources

As part of this support Aldec regularly offers on-site VHDL training, as do our Training Partners.  In addition, Aldec offers one of the most technical and easily accessible resource libraries in the industry – much of it dedicated to popular VHDL topics such as:

• Randomization and Functional Coverage
• Vector Implementation of Integer Arithmetic
• Better Coverage in VHDL
• Enhancing VHDL Designs with Embedded PSL
• Making a Simple, Structured and Efficient VHDL Testbench w/ Bitvis  
  
  

(If you don’t already have an Aldec account, signing up is easy and delivers one-click access to event registration, support, product downloads, evaluation licenses, recorded webinars, white papers, and more.)

The Industry’s Best VHDL-2008 Support

Aldec simulators, Active-HDL™ for FPGA Design and Riviera-PRO™  Advanced Verification Platform, deliver full support of the IEEE 1076-1993 Standard, IEEE 1076™-2002 VHDL standard and IEEE 1076™-2008 Standard. Both tools offer special settings to allow users to select any version of the standard listed above and even enable compatibility with older versions of the standards. New, powerful features, such as source encryption, PSL embedded in VHDL or VHPI interfacing to C/C++ code are also available in some configurations.

ALINT™, Aldec’s  Design Rule Checker, also fully supports IEEE VHDL and offers STARC VHDL and DO-254/ED-80 VHDL rule plug-ins.

In 2014, Aldec will celebrate its 30^th anniversary and that is no accident either. Our commitment to listen to our customers has enabled Aldec to grow into a global leader in the EDA industry. And as long as our customer’s continue to tell us what they need, we’ll continue to listen.